The term “flop,” or “flip-flop,” is generally used to describe or to refer to a clocked electronic circuit having two stable states, which is used to store a value. A flop generally comprises two latch circuits. The term “retention” flop is generally used to describe or to refer to a flop that is capable of retaining data while a portion of the circuit, e.g., input and/or output portions, is powered off.
Under the conventional art, a retention flop is generally formed by adding an additional, or “third” latch to a flop, sometimes known as a “balloon” flop. For example, the third latch retains a data value while portions of the rest of the flop are powered down. Unfortunately, such conventional art designs require an undesirably large die area, deleterious increases in a number of circuit elements, an unfavorable increase in the number and complexity of control signals required to operate the third latch in a “power down” mode, and a disadvantageous increase in power requirements, in both “normal” and “power down” modes of operation.